Testable Design of Template based QDI Asynchronous Circuits
نویسندگان
چکیده
Complexity of design and testing are the major obstacle for widespread use of asynchronous circuit in digital circuit design. Template based synthesis of asynchronous circuit is accepted as an effective way to decrease complexity of design of asynchronous circuit. One of the popular pre-designed templates that most synthesis tools use it to synthesis QDI asynchronous circuit is Pre-Charged Full Buffers (PCFB). In this paper we study the effect of single stuck-at fault in PCFB templates and categorize fault effects, then for each category introduce a circuit that detect faults. Experimental results show that using these additional circuits in PCFB buffers can improve the testability from 68.55 percent to 90.32 percent.
منابع مشابه
High Performance Asynchronous Pipelined QDI Templates for DCT Matrix-vector Multiplication
The mass application of asynchronous design has been an elusive goal for academic researchers while recent advances are promising. However asynchronous circuit has some inherent advantages over synchronous counterpart. The matrix – vector multiplication core of discrete cosine transforms (DCT) is demonstrated in this paper, by non linear pipelined templates. From this proposed DCT applications,...
متن کاملThe Design of High Performance Asynchronous Pipelines with Quasi Delay Insensitive
VLSI Design looking towards to solve design constructions that arises when using clock pulses. The majority of the constrains can be overcome by using asynchronous logic, additionally synchronous circuits has some inherent advantages over synchronous counterparts. This paper demonstrates the design of efficient asynchronous pipelines for some standard logic circuits and medium scale integration...
متن کاملMulti-Threshold Asynchronous Circuit Design for Ultra-Low Power
This paper presents an ultra-low power circuit design methodology which combines the MultiThreshold CMOS (MTCMOS) technique with quasi delay-insensitive (QDI) asynchronous logic, in order to solve the three major problems of synchronous MTCMOS circuits: (1) Sleep signal generation, (2) storage element data loss during sleep mode, and (3) sleep transistor sizing. In contrast to most power reduct...
متن کاملModeling and Synthesis of Multi-rail Multi-protocol QDI Circuits
Quasi-Delay-Insensitive (QDI) circuits behave correctly independently of arbitrary delays in gates or wires, which gives them many advantages. However, there are a lot of restrictions for the design of this type of circuits, making them difficult to synthesize automatically. This paper presents a new methodology to model and synthesize QDI asynchronous circuits. The targeted circuits use the mu...
متن کاملImproving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals
The purpose of this paper is to propose a design technique for improving the resistance of the Quasi Delay Insensitive (QDI) Asynchronous logic against Differential Power Analysis Attacks. This countermeasure exploits the properties of the QDI circuit acknowledgement signals to introduce temporal variations so as to randomly desynchronize the data processing times. The efficiency of the counter...
متن کامل